2018 is from December 1st to 5th. At the 64th IEEE International Electronic Device Conference (IEDM2018) held in San Francisco, California, USA, Leuven Microelectronics Research Center (IMEC) demonstrated a 300mm wafer platform using 2D Materials for metal-oxide-silicon field-effect transistor (MOSFET) devices.
2D materials can provide a path for extreme scaling of device size because they have atomic-level accuracy and are virtually unaffected by short-channel effects. Other potential applications for 2D materials may come from using it as a switch for back-end operations (BEOL), which can set an upper limit on the temperature presets allowed in integrated flows.
The Imec platform integrates a transistor channel composed of tungsten disulfide (WS2), which is a 2D material that has higher on-current capability and good chemical stability than most other 2D materials. Imec's report on IEDM states that this is the first time that metal organic chemical vapor deposition (MOCVD) has grown WS2 on a 300mm wafer. The MOCVD synthesis method can achieve single-layer accurate thickness control over the entire 300mm wafer and the material with the highest mobility. However, the benefits of MOCVD growth come at the expense of high temperature conditions.
In order to establish a BEOL-compliant device integration flow, the transfer of channel material from the growth substrate to the device wafer is critical. Imec claims to be the first to show a complete 300mm single-layer 2D material transfer, which in itself is very challenging because the adhesion of 2D materials to the device wafer is very low and the transferred material is extremely thin (only 0.7nm ).
The transfer process is with Garching SUSS MicroTec (producing photomask aligners, laser processing systems, and wafer adhesives) near Munich, Germany, and Brewer Science of Roll (providing thin wafer processing materials, processes) in Missouri, USA And equipment), developed using temporary bonding and debonding technology. The WS2 wafer is temporarily adhered to a glass carrier wafer using a specially formulated material (from Brewer Science). Then, the WS2 single layer was mechanically peeled from the growing wafer and bonded again to the device wafer in a vacuum. The carrier wafer is removed by laser lift-off. This debonding technology is a key technology for the controlled transfer of 2D materials.
Iuliana Radu, Imec's Beyond CMOS Project Leader, said: "Building a 300mm platform for MOSFET device research with 2D materials and developing an ecosystem of process steps has accelerated the application of these materials. However, many challenges remain to be resolved and are currently ongoing Related research and development. The main challenges include scaling the equivalent oxide thickness (EOT) of the gate dielectric of 2D materials and reducing the defect rate of the channel to improve mobility. "
Imec's research on advanced logic scaling is inseparable from the cooperation with the following companies on CMOS projects: Grofont Semiconductor, Huawei, Intel, Micron, Qualcomm, Samsung, Hynix, Sony Semiconductor Solutions, Toshiba, TSMC and Western Digital Wait.