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Nantero develops carbon nanotube NRAM (Nano-RAM)

Nantero has spent nearly 20 years researching carbon nanotube technology. As a pioneer in the application of semiconductor memory technology, the company expects the first products to be available later this year.

Bill Gervasi, chief system architect at Nantero (Woben, Massachusetts), said the company is busy helping its technology install in licensees' memory production lines.

The lasting interest in NRAM (although it has been on the market for a long time) comes from the many advantages of this technology: it can provide non-volatility at the speed of DRAM, and has the potential to exceed the scalability of DRAM and the super durability of flash memory. It is closer to general purpose memory than almost all emerging storage technologies (PCM, MRAM and ReRAM). In this way, they are usually used to replace flash memory, so NRAM can theoretically replace both DRAM and flash memory. The key now is to reduce costs.

 

Now, Nantero's partner Fujitsu Semiconductor is expected to cooperate with USJC to launch the first products. Fujitsu obtained a license in 2016 and called Nano-RAM (NRAM) as a suitable follow-up technology product for its ferroelectric RAM, which can be used independently or embedded in a microcontroller.

 

Gervasi said: "Fujitsu has started mass production this year." He said that he understands that one of the products will be independent memory and the other product will be a logic device with embedded NRAM.

Carbon nanotube pad

This technique is based on a slurry of randomly organized carbon nanotubes arranged in a thin layer between cross-point electrodes. When a voltage is applied, the CNTs are pulled together, and the increase in the number of contacts reduces the resistance path between the electrodes. This connection is maintained at the atomic level by Van der Waals forces. To reset the memory cell, voltage pulses cause thermal vibration to disconnect these connections.

 

The resulting memory provides a switching speed of 20 picoseconds at low energy, and an actual write speed of 5ns, and has an endurance of 10 ^ 11 cycles. This proves that CNT-based NRAM may be superior to competitor technologies (such as ReRAM and phase change memory), and has better scalability in terms of physical geometry, thus becoming a general-purpose memory that replaces DRAM and NAND flash memory.

 

A relatively new technique is to add a layer of aligned CNTs to the random tissue "pad" of randomly switchable CNTs. These are used to protect the lower layer of the switching nanotubes from metal migration from the metal sputtered from above.

Gervasi did not say exactly how CNTs prevent filament formation after many switching cycles. "We don't use metals like silver to promote filament formation. We do have a barrier layer of titanium nitride between the copper electrode and the top of the CNT cell. It is also likely to be an aluminum electrode."

 

Nantero was founded in 2001, and its development has been difficult, and the company has repeatedly claimed to be close to production. Nevertheless, it has gradually gained supporters and licensees. Gervasi said that the company has just closed the H round of equity financing, which has raised more than $ 140 million in funds raised by the company.

 

Long-term investors include Dell, Cisco, Kingston Technology and Schlumberger. The other is CFT Capital, a Chinese venture capital company incorporated by SMIC, the most advanced semiconductor foundry in mainland China. Recently, the company added Globespan Capital, CRV, Draper Fisher Jurvetson and Stata VenturePartners.

 

Stacking and MLC

However, to lead the way in DRAM and flash memory, Nantero may have to add a 3D stack. Fortunately, the technology can easily adapt to this situation. Gervasi said: "We have already stacked." He said that unnamed memory partners are working on 4-layer 16Gbit devices with a process between 22nm and 18nm.

 

Gervasi said that Nantero also knows how to perform multi-level unit processing of at least two to three bits per unit. He added: "In terms of voltage, we have 30 times between setting and reset. This is a linear relationship, but we are random." This means that the exact level of each unit will be different, so if It is difficult to go further without calibrating each memory cell. Gervasi said that writing in an iterative cell format can go further. Gervasi said: "Sequential writing takes time, but the writing speed is only 5ns."

 

Gervasi pointed out that economic and market access is at least as important as technology. He said that the cost of NAND flash memory is extremely low, which makes it difficult to break through this market initially. For DRAM, Moore's Law has stalled.

"Three years ago, end users did not adopt it (seeking a larger capacity of DRAM). Then, artificial intelligence and machine learning exploded in the cloud. With the demand for large-capacity memory and non-volatile, many new architecture studies .

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